Ricursive wants AI to redesign whole chips, not just build more data centers
At Disrupt, Anna Goldie and Azalia Mirhoseini argue that AI can find unconventional layouts and make better use of existing compute infrastructure.
A different response to the compute squeeze
Ricursive Intelligence is pitching better chip design as a way to stretch computing infrastructure. At TechCrunch Disrupt on October 14, founders Anna Goldie and Azalia Mirhoseini described AI that designs chips, learns from each iteration and improves subsequent designs, according to TechCrunch’s English report published early October 15 UTC.
Their central distinction is scope. The pair say they optimize entire chips instead of splitting the problem into dozens of smaller blocks. They argue that AI can discover unconventional arrangements that human designers might not initially choose, potentially using data-center bandwidth and fabrication resources more efficiently.
As background, they cited a circular, donut-shaped layout produced by AlphaChip, their earlier work. That example is not a newly released Ricursive chip. They also described intricate patterns, including wave-like designs, which they said they intend to share more about later.
Ambitious expectations, not shipped results
Goldie projected at least 10,000 times more demand for compute over the next five years. That is her forecast, not a verified demand trajectory. It explains the startup’s pitch: meeting such demand solely by adding more data centers would be an enormous task.
She also suggested that if designing a chip took roughly a week, custom chips could become financially practical for more applications, including space and augmented or virtual reality. The conditional matters. TechCrunch’s report does not establish that Ricursive already designs production-ready chips in a week, or that the approach has delivered a measured energy saving in deployed hardware.
The fresh development is the founders’ public account of their whole-chip strategy and its intended benefits. It offers a concrete alternative for the compute debate while leaving performance, manufacturing outcomes and delivery timelines to be demonstrated.